(In reply to Luke Kenneth Casson Leighton from bug #1087 comment #6)
> done.
> 
> +        # write FPSCR
> +        if name in ['FPSCR', ]:
> +            log("write FPSCR 0x%x" % (output.value))
> +            self.FPSCR.eq(output)
> +            return

assigning to FPSCR from the pseudocode function's return value generally does nothing at all because FPSCR is a python class and is passed by reference and pseudocode generally only assigns to attributes (directly modifying the FPSCR register in the process) rather than the whole FPSCR variable.

(In reply to Luke Kenneth Casson Leighton from bug #1087 comment #7)
> to "effect" a "no change", the variable that requires "not to be changed"
> must:
> 
> 1) be passed in as an INPUT parameter

ok, we need this for RT for fcvtfg and FRT in most fp pseudocode, unless fcvt* is changed to always write RT as I proposed in #1087, though we still need it for FRT in most pseudocode.

> 2) not be modified by the pseudocode
> 3) be passed OUT as a return result.

(In reply to Jacob Lifshay from comment #2)
> (In reply to Luke Kenneth Casson Leighton from bug #1087 comment #7)
> > to "effect" a "no change", the variable that requires "not to be changed"
> > must:
> > 
> > 1) be passed in as an INPUT parameter
> 
> ok, we need this for RT for fcvtfg and FRT in most fp pseudocode, unless
> fcvt* is changed to always write RT as I proposed in #1087, though we still
> need it for FRT in most pseudocode.

I added a way to add that without needing to use special pseudocode syntax since the ISA WG doesn't need to see all our simulator special case helper annotations -- it uses a html comment:

https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=870f7f23273d1d0d49af9ed09d82c42f2347ef07

commit 870f7f23273d1d0d49af9ed09d82c42f2347ef07
Author: Jacob Lifshay <programmerjake@gmail.com>
Date:   Tue May 23 19:24:34 2023 -0700

    add support for adding extra uninit_regs from html comment
    
    I chose an html comment since it's not part of the proposed pseudocode
    
    like so:
    * blah RT,RA
    Pseudo-code:
    
    <!-- EXTRA_UNINIT_REGS: RT -->
        if rand() then
            RT <- 42 + (RA)

already completed.