As a learning exercise with Shriya, I created a repo containing nMigen code examples that a beginner could start running after setting up a Libre-SOC environment. The intention of the code: - Simple enough to understand - Generates verilog output - Generates gtkw trace file for nicer gtkwave output Examples will be taken from existing projects (nMigen, etc.) or newly written.
i added the URL where all of the tutorials and everything i could find is located. please remember UNDER NO CIRCUMSTANCES quote or reference any Trademark-violating work.
First commit, added up_counter.py example from the nmigen gitlab repo, modified to include gtkw file generation (for pretty gtkwave traces). https://gitlab.com/nmigen/nmigen/-/tree/master/docs/_code https://git.libre-soc.org/?p=nmigen-examples.git;a=commitdiff;h=472beee1b20ada92578e31b446b4d81c2d88a07c There's enough to run the example, but I haven't added the details to the guide that I'm planning to.