Bug 1176 - implement CR-Based (not CR *FIELD* based) SVP64 in ISACaller (sv.mcrxr, sv.mtcr etc)
Summary: implement CR-Based (not CR *FIELD* based) SVP64 in ISACaller (sv.mcrxr, sv.mt...
Status: CONFIRMED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: Other Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL:
Depends on: 1175
Blocks: 952 961 1056
  Show dependency treegraph
 
Reported: 2023-09-27 08:50 BST by Luke Kenneth Casson Leighton
Modified: 2023-09-27 08:52 BST (History)
1 user (show)

See Also:
NLnet milestone: ---
total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0
parent task for budget allocation:
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:


Attachments

Note You need to log in before you can comment on or make changes to this bug.
Description Luke Kenneth Casson Leighton 2023-09-27 08:50:55 BST
it is in the SV Spec but needs implementing

---

 125 # Move Condition Register Field
 126 
 127 XL-Form
 128 
 129 * mcrf BF,BFA