Bug 1222 - setvl Rc=1 needs to be more sophisticated
Summary: setvl Rc=1 needs to be more sophisticated
Status: CONFIRMED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Specification (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL:
Depends on:
Blocks: 672
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Reported: 2023-11-28 21:10 GMT by Luke Kenneth Casson Leighton
Modified: 2023-11-28 21:10 GMT (History)
1 user (show)

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Description Luke Kenneth Casson Leighton 2023-11-28 21:10:16 GMT 
* when VL is set to greater than MAXVL (and truncated), CR0.GT is set to 1
* when VL is non-zero, CR0.LT is set to 1
* when VL is set to zero, CR0.EQ is set to 1

in that order because MAXVL might be zero.
overflow (CR0.SO) should be fine

this allows detection of some loop conditions that
are useful.  for example when detecting that VL is
set to a last value (between 0 and MAXVL) you know
that a loop is terminating, so sv.bc has no need
to branch back.  this *without* using CTR.