Bug 1249 - insndb twin-predication, one predicate (sm or dm) is allowed
Summary: insndb twin-predication, one predicate (sm or dm) is allowed
Status: RESOLVED INVALID
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL:
Depends on:
Blocks: 676
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Reported: 2024-01-10 17:36 GMT by Luke Kenneth Casson Leighton
Modified: 2024-01-10 17:48 GMT (History)
2 users (show)

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Description Luke Kenneth Casson Leighton 2024-01-10 17:36:33 GMT 
source-mask only is perfectly allowed, the dest-mask is implicitly
"all 1s".  likewise, dest-mask only is perfectly allowed, the
src-mask will be implicitly "all 1s".

i will take out the code/check that is stopping this from working?

                "sv.addi/mr/sm=lt 4, *4, 0", # r4 = last non-masked value

======================================================================
ERROR: test_sv_maxloc_1 (__main__.DDFFirstTestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/decoder/isa/test_caller_svp64_maxloc.py", line 58, in test_sv_maxloc_1
    self.sv_maxloc([0,6,1,2])
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/decoder/isa/test_caller_svp64_maxloc.py", line 102, in sv_maxloc
    lst = list(lst)
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/asm.py", line 61, in __iter__
    yield from self.trans
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/asm.py", line 114, in translate
    yield from self.translate_one(insn)
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/asm.py", line 105, in translate_one
    insn = SVP64Instruction.assemble(record=record,
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/core.py", line 3380, in assemble
    specifiers = Specifiers(items=specifiers, record=record)
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/core.py", line 3192, in __new__
    spec.validate(others=(head + tail))
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/core.py", line 2652, in validate
    raise ValueError("missing dest-mask in CR twin predication")
ValueError: missing dest-mask in CR twin predication
Comment 1 Luke Kenneth Casson Leighton 2024-01-10 17:39:34 GMT 
        if self.pred.mode is _SVP64PredMode.CR:
            twin = None
            for spec in others:
                if isinstance(spec, SpecifierDM):
                    twin = spec

arse. fek. ecumenical matters. *CR* twin-predication
has to have two predicates. solvable by using dm=~SO.

closing as invalid.
Comment 2 Dmitry Selyutin 2024-01-10 17:48:58 GMT 
(In reply to Luke Kenneth Casson Leighton from comment #1)
>         if self.pred.mode is _SVP64PredMode.CR:
>             twin = None
>             for spec in others:
>                 if isinstance(spec, SpecifierDM):
>                     twin = spec
> 
> arse. fek. ecumenical matters.

LOL, "Father Ted", right? :-D