an adaptable pipeline would be really nice to have, trading latency for depth and allowing increased clock rate.
https://groups.google.com/forum/#!topic/comp.arch/fcq-GLQqvas --- This is by IBM but for a pipelined MPEG decoder: Fine-Grain Real-Time Reconfigurable Pipelining 2003 http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.6.1015 Other search terms are "transparent pipeline" "collapsed pipeline" "Adaptive pipeline" Transparent mode flip-flops for collapsible pipelines 2007 http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.182.2056 Adaptive pipeline structures for speculation control 2003 http://apt.cs.manchester.ac.uk/ftp/pub/amulet/papers/efthym_async03.pdf
(In reply to Luke Kenneth Casson Leighton from comment #0) > an adaptable pipeline would be really nice to have, trading latency for > depth and allowing increased clock rate. let's just not make another NetBurst. :)
(In reply to Jacob Lifshay from comment #2) > let's just not make another NetBurst. :) https://pcper.com/2011/08/yes-netburst-really-was-that-bad-cpu-architectures-tested/ "One way that Pentium Netburst kept high clock rates was by having a ridiculously huge pipeline, 2-4x larger than the first generation of Core 2 parts which replaced it; unfortunately the Pentium 4 branch prediction was terrible keeping the processor stuck needing to dump its pipeline perpetually." hey it's good that like, y'know... we're doing this processor with so many historical mistakes to learn from...