Bug 299 - improve memory clash detection
Summary: improve memory clash detection
Status: CONFIRMED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: Other Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL:
Depends on:
Blocks:
 
Reported: 2020-05-02 00:39 BST by Luke Kenneth Casson Leighton
Modified: 2020-05-02 00:39 BST (History)
1 user (show)

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Description Luke Kenneth Casson Leighton 2020-05-02 00:39:59 BST 
https://groups.google.com/d/msg/comp.arch/leXwF1j7Z-A/S1t_EHumAQAJ

see this message (and the one before it).

must work through to see if there is a way to combine the Mem Hazard Matrix logic with addr match and spot interleaved LDs and STs that do not clash.

at the moment, *any* LD will stop future STs from going through.  *any* ST likewise stops LDs from going through.

it *may* be possible to use addr match on LSBs to determine which interleaved LDs and STs can be separated into batches of LDs and batches of STs.