Bug 451 - Add PowerPC64 to Rust's new inline assembly implementation
Summary: Add PowerPC64 to Rust's new inline assembly implementation
Status: RESOLVED FIXED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: All All
: --- enhancement
Assignee: Jacob Lifshay
URL:
Depends on:
Blocks: 54
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Reported: 2020-08-06 21:21 BST by Jacob Lifshay
Modified: 2022-06-18 19:57 BST (History)
3 users (show)

See Also:
NLnet milestone: NLnet.2019.02.012
total budget (EUR) for completion of task and all subtasks: 400
budget (EUR) for this task, excluding subtasks' budget: 400
parent task for budget allocation: 54
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:
DrChat={amount=400, submitted=2021-05-17, paid=2021-05-17}


Attachments

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Comment 1 Jacob Lifshay 2020-08-06 22:03:50 BST
Kazan will also most likely need inline assembly, so adding this to Kazan's budget. Setting to €400 for now.
Comment 2 Jacob Lifshay 2020-08-06 23:08:57 BST
Better description:
Add PowerPC64 support to Rust's new `asm!` macro for inline assembly. This includes writing the code and going through the process of merging it into upstream Rust and addressing any concerns that arise in the process.
A GitHub account is required.
Knowledge of PowerPC assembly and/or Rustc's internals would be useful.

Amanieu:
> Adding support for a new architecture is actually quite straightforward since
> most of the work is already done in LLVM. You only need to make 2 changes:
> 
> Add the register definitions to src/librustc_target/asm/.
> Add lowering to LLVM asm to src/librustc_codegen_llvm/asm.rs.
> Have a look at #73214 which added inline asm support for Hexagon.

This is more complex than adding support for Hexagon since PowerPC has many more constraint kinds than Hexagon (the example pull request below).

Links:
LLVM inline assembly ISA-specific constraint code list:
https://llvm.org/docs/LangRef.html#supported-constraint-code-list
LLVM inline assembly reference:
https://llvm.org/docs/LangRef.html#inline-assembler-expressions
PowerPC Spec (not expected to read all of it):
https://wiki.raptorcs.com/w/images/f/f5/PowerISA_public.v3.1.pdf
Example pull request for adding ISA to Rust's `asm!` macro:
https://github.com/rust-lang/rust/pull/73214
RFC for Rust's `asm!` macro:
https://github.com/rust-lang/rfcs/pull/2873
Comment 3 Jacob Lifshay 2020-10-13 00:56:39 BST
Relevant issues I discovered with inline assembly in LLVM:
https://bugs.llvm.org/show_bug.cgi?id=47811
https://bugs.llvm.org/show_bug.cgi?id=47812
Comment 4 Jacob Lifshay 2021-05-17 23:45:49 BST
Just now discovered that DrChat on github implemented this!

https://github.com/rust-lang/rust/pull/85279
Comment 5 Luke Kenneth Casson Leighton 2021-05-18 00:40:05 BST
(In reply to Jacob Lifshay from comment #4)
> Just now discovered that DrChat on github implemented this!
> 
> https://github.com/rust-lang/rust/pull/85279

great!  sent details to DrChat about RFPs. jacob can you take
care of budget-sync.
Comment 6 Jacob Lifshay 2021-05-18 02:20:18 BST
(In reply to Luke Kenneth Casson Leighton from comment #5)
> jacob can you take
> care of budget-sync.

Done, except I no longer have the right ssh permissions to push the generated files to the server.