Bug 518 - Define JTAG pins and set up with litex for versa_ecp5
Summary: Define JTAG pins and set up with litex for versa_ecp5
Status: RESOLVED DUPLICATE of bug 517
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: PC Linux
: Normal normal
Assignee: Cole Poirier
URL:
Depends on:
Blocks: 383
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Reported: 2020-10-15 18:38 BST by Cole Poirier
Modified: 2020-10-15 18:48 BST (History)
2 users (show)

See Also:
NLnet milestone: NLNet.2019.10.043.Wishbone
total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0
parent task for budget allocation: 383
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:


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Description Cole Poirier 2020-10-15 18:38:48 BST
http://lists.libre-soc.org/pipermail/libre-soc-dev/2020-October/000873.html

JTAG pins need to be defined and configured with litex for versa_ecp5
Comment 1 Luke Kenneth Casson Leighton 2020-10-15 18:48:52 BST

*** This bug has been marked as a duplicate of bug 517 ***