this is unnecessary because mmu0 internal_op is 100% guaranteed to be identical to self.internal_op.
all of those lines shall be deleted and replaced with
929 comb += self.do_copy("insn_type", self.op_get("internal_op"))
remember to git push :)
I pushed the last change.
It is a weird thing, for a different project I use subversion, which does not have a push.
In src/soc/simple/core.py I added this line: self.decoders["mmu0"].mmu0_spr_dec = self.decoders["spr0"]
after having found out using GTKWave that the insn_type for mmu0 is OP_INVALID in my unit test where is use "mtspr 18, 1". The correct insn_type for DSISR DAR SVSRR0 and PIDR is passed to the wrong function unit instead.
(In reply to Tobias Platen from comment #4)
> In src/soc/simple/core.py I added this line:
> self.decoders["mmu0"].mmu0_spr_dec = self.decoders["spr0"]
ok that will need a comment, cross-reference this bugreport as well
special-case hacks like that we need to pay attention to. then also
cross-reference it in PowerDecoderSubset as well, that mmu_spr_dec
is set up in simple/core.py
what we don't need is surprises when people go "where does mmu0_spr_dec
come from, it's not in the constructor, wtf??"
> after having found out using GTKWave that the insn_type for mmu0 is
> OP_INVALID in my unit test where is use "mtspr 18, 1". The correct insn_type
> for DSISR DAR SVSRR0 and PIDR is passed to the wrong function unit instead.
yyeah this is because of the subset decoding. there may be more that needs
note i've just pushed this:
commit f5549bf43d740610a5980b5930241ff37641bdd6 (HEAD -> master, origin/master)
Author: Luke Kenneth Casson Leighton <email@example.com>
Date: Mon Mar 1 19:35:31 2021 +0000
Revert "fix Bug 607 - unnecessary code added related to MMU in PowerDecoder2"
rright. ok. what this is doing is asking BOTH the SPR *AND* the MMU pipelines to process the MTMSR operation.
clearly this is disastrous because there will be two FUs fighting for the register file amongst other things.
try moving it to PowerDecoder2, removong mmu_spr_dec and simply "overriding" the fn_unit etc.
with m.If((fn_unit == Function.SPR) &
OP_MTMSR & DSR etc etc))
comb += self.do_copy("fn_unit", Function.MMU)
this *really* should be enough to get the operation redirected to the correct FU Decoder.
ohh i know what needs to be done. there is a filter which selects the rows of CSV files. because the CSV file says "this is for SPR pipe" it is getting filtered out.
let me find the location.
urr this is a nuisance.
i think the solution here is to modify the CSV files or perhaps even add special sub-processing entries for the SPR field.
have to think
ok there are a few things going on here. the CSV File always directs to the SPR FU. i've added a filter which allows the CSV entry to get through to the MMU FU.
then stopped non-MMU SPR requests from getting to the SPR FU and only allowed them to get to the MMU FU.
then also i had to fix the MMU FSM to get it to store in the SPR regfile.
also, the unit test was wrong. you can't give a FU things that it is incapable of processing. the MMU FSM cannot cope with SPRs numbered 720 for example.