Bug 760 - calculate signal values in a Topological Ordering
Summary: calculate signal values in a Topological Ordering
Alias: None
Product: Libre-SOC's second ASIC
Classification: Unclassified
Component: source code (show other bugs)
Version: unspecified
Hardware: Other Linux
: Lowest enhancement
Assignee: wielgusmikolaj
Depends on:
Blocks: 665
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Reported: 2021-12-23 18:33 GMT by Jacob Lifshay
Modified: 2021-12-23 19:14 GMT (History)
3 users (show)

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Description Jacob Lifshay 2021-12-23 18:33:19 GMT

if you just have a single combinatorial circuit without feedback loops, you should be able to calculate a topological ordering of the signals, such that you don't need a simulate loop cuz it can always calculate all signal values in a 	single step by calculating them in that specific ordering. this should greatly simplify the produced c code and make it run faster cuz you don't need the whole signal change tracking system.


that would also help locate combinatorial loops (which is something not done at the moment, at all, in nmigen Simulation, and it's a pain)

the only thing being a pain in the neck, that sort takes place across an entire swathe of modules/fragments/processes
Comment 1 Luke Kenneth Casson Leighton 2021-12-23 19:14:29 GMT
nice idea, bear in mind it is an optimisation (priority set to low)
even detecting feedback loops is slightly problematic when SR latches
are involved.