Bug 777 - Add / documentation / relicense Tercel QSPI XIP core
Summary: Add / documentation / relicense Tercel QSPI XIP core
Status: RESOLVED FIXED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: Other Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL:
Depends on:
Blocks:
 
Reported: 2022-02-23 18:33 GMT by tpearson
Modified: 2022-06-17 18:53 BST (History)
1 user (show)

See Also:
NLnet milestone: NLnet.2019.02.012
total budget (EUR) for completion of task and all subtasks: 1750
budget (EUR) for this task, excluding subtasks' budget: 1750
parent task for budget allocation: 50
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:
tpearson={amount=1750, submitted=2022-02-26, paid=2022-03-03}

Attachments
Add an attachment (proposed patch, testcase, etc.)

Note You need to log in before you can comment on or make changes to this bug.
Description tpearson 2022-02-23 18:33:26 GMT 
- Added the Tercel QSPI XIP-capable core to the LibreSoC Microwatt tree
   - Reworked Microwatt to pull internal SPI core hooks out of main SoC
 - Enabled on ECP5-85 Arctic Tern boards
 - Documented core (initial datasheet)
 - Verified synthesis / PAR and resource usage
 - Relicensed as LGPLv3+