COMPLETED - Added the Aquila LPC slave DMA-capable core to the LibreSoC Microwatt tree - Added a fourth DMA master to Microwatt core - Enabled on ECP5-85 Arctic Tern boards - Extended for true 64-bit DMA (required by Microwatt's 64-bit busses) - Documented core (initial datasheet) - Verified synthesis / PAR and resource usage - Relicensed as LGPLv3+ TODO - Verify extended version works on Arctic Tern hardware with POWER9 host (estimated timeframe late March 2022)
CURRENT STATUS - Added the Pinyon dual port block RAM interface / specification - Moved LPC slave buffers from ECP5 primitives to Pinyon RAMs