predicates in Horizontal-First Mode are loaded at the start of each instruction.
for Vertical-First this is a problem.
here was an idea of having a CTR reading mode. VF mode needs some bits
to say which preficates are to be protected (made read-only). therefore
swap vf with ct bit, and move vf mode to 24 bit RM.
then, add bits 4 for r3 r10 r30 CRf
then, allow CR Predicate to be selected starting
from CR16,CR32,CR48,CR64 (2 bits)
given that VF mode only uses a single bit this is fine. that will be a single
CRf in CR Predication.