Bug 894 - Issues with TOC immediate loading being redundant with PowerISA v3.1 pld R=1 and being CISC
Summary: Issues with TOC immediate loading being redundant with PowerISA v3.1 pld R=1 ...
Status: CONFIRMED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Specification (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- normal
Assignee: Luke Kenneth Casson Leighton
URL: https://libre-soc.org/openpower/sv/to...
Depends on:
Blocks: 286
  Show dependency tree / graph
 
Reported: 2022-07-27 04:18 BST by Jacob Lifshay
Modified: 2022-07-27 04:19 BST (History)
2 users (show)

See Also:
NLnet milestone: ---
total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0
parent task for budget allocation:
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:

Attachments
Add an attachment (proposed patch, testcase, etc.)

Note You need to log in before you can comment on or make changes to this bug.
Description Jacob Lifshay 2022-07-27 04:18:49 BST 
Reposting my complaint here, so it doesn't get forgotten:

https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/toc_data_pointer.mdwn;h=74b1c9d1f2162463593ce7e0b458474039ccc361;hb=HEAD

if you have:
cmpi r3, {TOC + 8}
imho that's basically the same as x86_64's CISC-style register-memory instruction:
cmp rax, [rip+0x1234]

imho a better approach is to instead just use the pc-relative loads added as part of v3.1 -- pld with R=1:
pld r4, 0x1234(0), 1 # r4 = load_64(pc + 0x1234)
cmp r3, r4

no TOC needed.