Bug 947 - switch reference assembler to machine-readable specs
Summary: switch reference assembler to machine-readable specs
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Dmitry Selyutin
Depends on:
Blocks: 939
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Reported: 2022-10-13 17:11 BST by Dmitry Selyutin
Modified: 2023-03-13 17:25 GMT (History)
2 users (show)

See Also:
NLnet milestone: NLnet.2021-08-071.cavatools
total budget (EUR) for completion of task and all subtasks: 5500
budget (EUR) for this task, excluding subtasks' budget: 5500
parent task for budget allocation: 939
child tasks for budget allocation: 948 949 950
The table of payments (in EUR) for this task; TOML format:
[ghostmansd] amount=5500 submitted=2023-03-06 paid=2023-03-10


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Description Dmitry Selyutin 2022-10-13 17:11:47 BST
We already have various machine-readable files which describe the instructions, the prefixing rules and other essential important parts. However, the current assembly code does not consider all this information, and instead duplicates some parts of it in the code, or implements some bits of the logic which should have relied on the generation. The current approach leads to code duplication and software rot; what's worse, there's a need to keep track of instructions in the code whenever these are changed in the specifications. This task intends to build the essential parts needed to make most of the assembly to be generated automatically.
Comment 1 Dmitry Selyutin 2022-10-22 10:18:58 BST
Updated the title, since this must be done for both binutils and pysvp64asm.
Comment 2 Dmitry Selyutin 2022-11-08 20:44:55 GMT
We're moving towards cool assembly and disassembly! Word instructions are (mostly?) complete; and SVP64 instructions are on the way. I started with operands, since I still remember how they work and I'd really like to complete them until I forget it. Then I'll address opmodes.

There are too many changes to recall, but these are major ones:
1. We now support GPR and FPR remap on insndb level, including vectors. There must be more checks, like checks for ranges, but anyway.
2. We now support a cool and sweet CR operands assembly syntax, in any of these forms: CR, N*CR, CR*N, BIT+CR, CR+BIT, BIT+N*CR, N*CR+BIT, etc. Again, the strict checks are to be added later.
3. Disassembly now supports that syntax too, including our home-grown "<CR>.<COND>" syntax.

An example is below. Be sure to use the latest binutils, since I fixed some issues in the scope of this task.

$ cat /tmp/test.s && INSNDB=true SILENCELOG=true pysvp64asm /tmp/test.s /tmp/py.s && echo "### PYSVP64ASM ###" && cat /tmp/py.s && echo "### BINUTILS ###" && powerpc64le-linux-gnu-as -mlibresoc /tmp/py.s -o /tmp/test.o && powerpc64le-linux-gnu-objcopy -Obinary /tmp/test.o /tmp/bin.o && powerpc64le-linux-gnu-objdump -dr -Mlibresoc /tmp/test.o && echo "### PYSVP64DIS ###" && time pysvp64dis /tmp/bin.o

sv.isel 2,3,4,28
sv.isel r2,r3,r4,4*cr7+lt
sv.cmpi 5,1,3,2
sv.add *122,56,*3
### PYSVP64ASM ###
.long 0x05400000; .long 0x7C43271E; # sv.isel 2,3,4,28 # sv.isel 2,3,4,28
.long 0x05400000; .long 0x7C43271E; # sv.isel r2,r3,r4,4*cr7+lt # sv.isel r2,r3,r4,4*cr7+lt
.long 0x05400000; .long 0x2EA30002; # sv.cmpi 5,1,3,2 # sv.cmpi 5,1,3,2
.long 0x054031E0; .long 0x7FD80214; # sv.add *122,56,*3 # sv.add *122,56,*3
### BINUTILS ###

/tmp/test.o:     file format elf64-powerpcle

Disassembly of section .text:

0000000000000000 <.text>:
   0:   00 00 40 05     sv.isel r2,r3,r4,cr7.lt
   4:   1e 27 43 7c 
   8:   00 00 40 05     sv.isel r2,r3,r4,cr7.lt
   c:   1e 27 43 7c 
  10:   00 00 40 05     sv.cmpdi cr5,r3,2
  14:   02 00 a3 2e 
  18:   e0 31 40 05     sv.add  *r122,r56,*r3
  1c:   14 02 d8 7f 
### PYSVP64DIS ###
00 00 40 05    sv.isel r2,r3,r4,cr7.lt
1e 27 43 7c    
00 00 40 05    sv.isel r2,r3,r4,cr7.lt
1e 27 43 7c    
00 00 40 05    sv.cmpi cr1.gt,1,r3,2
02 00 a3 2e    
e0 31 40 05    sv.add *r122,r56,*r3
14 02 d8 7f
Comment 3 Dmitry Selyutin 2023-01-24 21:48:46 GMT
OK, we've finally reached some stable point. Only one test appear to be failing in insndb branch:

This test fails in master as well:

I consider this task done; any further enhancements should be done in scope of other tasks. Any objections?