Bug 115 - SIMD ALUs needed
Summary: SIMD ALUs needed
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: ALU (including IEEE754 16/32/64-bit FPU) (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL: https://libre-soc.org/3d_gpu/architec...
Depends on: 1024 101 132
Blocks: 116 48
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Reported: 2019-07-25 15:37 BST by Luke Kenneth Casson Leighton
Modified: 2023-09-05 05:28 BST (History)
1 user (show)

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Description Luke Kenneth Casson Leighton 2019-07-25 15:37:39 BST
SIMD back-end operations are needed, using the ReservationStation
infrastructure.  it would be nice to still be able to do early-out.
will need unary selection and cancellation done, first.
Comment 1 Luke Kenneth Casson Leighton 2021-10-02 17:33:13 BST
with PartitionedSignal in place, the idea here is to have a Stage API
class which automatically understands and carries the Partition Context
throughout all pipelines.

the IO Data (as defined by regspecs) is then *automatically* allocated
PartitionedSignals rather than scalar Signals and thus the ALUs, comprising
as they do of Stage API pipelines, do not need massive intrusive conversion.

a wrapper around nmigen dsl.Module can then allocate PartitionedSignals.

however this should not be "all-in", it should be dynamic runtime configureable
as to whether the ALU should be instantiated as scalar or as SIMD.