Bug 116 - Integer ADD/MUL/DIV operations needed (using FP bypass). SIMD as well
Summary: Integer ADD/MUL/DIV operations needed (using FP bypass). SIMD as well
Status: CONFIRMED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: ALU (including IEEE754 16/32/64-bit FPU) (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL:
Depends on: 102 114 115 124 101
Blocks: 48
  Show dependency treegraph
 
Reported: 2019-07-25 15:41 BST by Luke Kenneth Casson Leighton
Modified: 2020-09-21 17:13 BST (History)
1 user (show)

See Also:
NLnet milestone: NLnet.2019.02
total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0
parent task for budget allocation: 48
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:


Attachments

Note You need to log in before you can comment on or make changes to this bug.
Description Luke Kenneth Casson Leighton 2019-07-25 15:41:06 BST
to be split into 3 separate tasks, and relying on infrastructure
to be added first: INT ADD/MUL/DIV are needed, with signed/unsigned,
8/16/32/64, including SIMD, and cancellelation.