Bug 252 - 3D accelerated opcodes need to be added to the POWER ISA simulator
Summary: 3D accelerated opcodes need to be added to the POWER ISA simulator
Status: RESOLVED FIXED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL:
Depends on:
Blocks: 140
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Reported: 2020-03-13 15:36 GMT by Luke Kenneth Casson Leighton
Modified: 2022-10-01 12:32 BST (History)
1 user (show)

See Also:
NLnet milestone: NLNet.2019.10.042.Vulkan
total budget (EUR) for completion of task and all subtasks: 7000
budget (EUR) for this task, excluding subtasks' budget: 0
parent task for budget allocation: 140
child tasks for budget allocation: 896 898 899
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Description Luke Kenneth Casson Leighton 2020-03-13 15:36:02 GMT 
adding iterated support for 3D opcodes to ISA Simulator (and unit tests) is needed.  likely to be added to gem5.
Comment 1 Luke Kenneth Casson Leighton 2022-09-16 00:34:03 BST 
all sub-tasks completed 100%, closing this one.
RFPs are going in under *this* bugreport (252)