Bug 481 - SPR pipeline forgot to use full_xer
Summary: SPR pipeline forgot to use full_xer
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
Depends on:
Blocks: 348
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Reported: 2020-08-29 19:34 BST by Luke Kenneth Casson Leighton
Modified: 2020-08-31 11:34 BST (History)
1 user (show)

See Also:
NLnet milestone: ---
total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0
parent task for budget allocation:
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:


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Description Luke Kenneth Casson Leighton 2020-08-29 19:34:36 BST
a full_xer port exists, SPR pipe_data.py forgot to use it.
currently going to use that port for DMI so as to be able
to read XER