Creation of the pseudo-code for the new instructions we will be creating, as well as modification of existing pseudo-code, where warranted, for the purposes of usage as a reference for simulation of the new/modified instructions for testing purposes, as well as potential submission as one or more proposals to the OpenPower Foundation as the de-jure reference for how those proposed new instructions should function. Also, creation/improvement of the unit-tests for the above referenced pseudo-code (budgeted separately under bug #850)
I've received the payment for tasks 771 and 840, but I'm kinda unsure about the sum. I'll contact Michiel via email.
* https://libre-soc.org/openpower/sv/biginteger/ * https://libre-soc.org/openpower/sv/bitmanip/ bug #817 paid bug #745 paid bug #755 paid bug #784 paid
(In reply to Luke Kenneth Casson Leighton from comment #20) > Are you sure you want to position it this way, as AVX-512 has been pulled > off the market for undisclosed reasons - but to some linked to patent issues > Intel ran into? > > Best regards, > Michiel Leenaars i do not know where the statement comes from, and as a research project patents do not enter into the picture: it will be a commercial decision which is out of scope for Libre-SOC. however 1. it is extremely unlikely that Simple-V will run into issues, as it is a new design concept that abstracts Prefix from Suffix. 2. patents may be on *hardware* only - not on APIs. and SV is an *API* that does not specify or restrict or curtail how hardware implements it. Suffix *individual instructions* may happen to have hardware implementations that are patentable material: it is a simple job to avoid those. Prefix *looping* may be implemented any which way the implementor chooses. if there is a patent on one method of implementation, implementors choose a different method to avoid that hardware patent. none of which is down to the specification (as an API designed under Research Grants, not commercial objectives) additionally there may be a fundamental misunderstanding about the difference between AVX512 and SV. SV is PURELY an abstract looping concept, the SEPARATION of "looping" from the "SCALAR instruction being looped". AVX512 is a ONE DIMENSIONAL instruction set. scalar instructions are repeated (ad nauseam) with a for loop around each, the end result being 10,000 instructions (and a dog's dinner mess but that discussion is out of scope) therefore it is the SCALAR instructions that are added to the base ISA (in this case Power ISA as an example), one by one. we repeat again and again and again: there *is* no "Vector Add" in SV there is only a SCALAR Add instruction and there happens to be GENERAL PURPOSE looping that HAPPENS to be possible to apply to that SCALAR add instruction just like all and any other instructions in GENERAL. bottom line, it is not Libre-SOC's problem, the space is radically different, the concept entirely different, and it is the SCALAR instruction individual hardware implementation(s) that are more likely to run into patent minefields... but that's what any SCALAR processor would also run into, and is a general problem that has absolutely nothing to do with SV as a looping CONCEPT and API.