Bug 589 - gigabit router asic
Summary: gigabit router asic
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Milestones (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL: https://libre-soc.org/crypto_router_a...
Depends on: 630
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Reported: 2021-02-06 14:32 GMT by Luke Kenneth Casson Leighton
Modified: 2021-09-13 15:34 BST (History)
2 users (show)

See Also:
NLnet milestone: NLnet.2021.02A.CryptoRouter
total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0
parent task for budget allocation:
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:


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Description Luke Kenneth Casson Leighton 2021-02-06 14:32:23 GMT
placeholder. APPROVED. TODO: define tasks for MoU

* Porting PDKMaster to Sky130, including flow, simulations setup, design rules, ...: 3500EUR.
* Std. cell library optimization, more area efficiency + timing investigation: 1000EUR
* IO library: 125MHz operation + multiplexing capability in test chip for ULPI/RGMII: 2500EUR
* flexram SRAM on Sky130, two options
  * single block: 750EUR
  * compiler that can generate different blocks: 1500EUR

We need to first define what one actually want to test and who does what.
Test only functional through JTAG patterns provided to me or full test on ethernet and USB functionality ?
Will there be PCB needed with ethernet PHY and/or USB PHY ?
So budget needed may go from 1000EUR to 5000EUR I would say.

Top level bugs:

* bug #630 - Skywater 130nm PDKMaster
Comment 2 Staf Verhaegen 2021-04-24 11:53:19 BST

Comment 3 Luke Kenneth Casson Leighton 2021-09-13 15:34:04 BST
Draft instructions partially designed: