After designing the SRAM cell in bug #827 the compiler need to be made. This task will consist of the following subtasks:
* layout helper functions in PDKMaster to ease layout
* Update layout of 1RW subblocks for optimized 1RW SRAM cell and
* Update layout of subblocks to handle double bitline pair for 2RW dual part compiler.
The SRAM compiler development will be moved to another LIP6-Chips4Makers cooperation project. Giving more time for completion and focus on other things for NGI Pointer.