from the bug #137 video codecs it was clear that many implementations of DCT/FFT are integer-based. therefore integer butterfly instructions. ARM already has them: vqrdmulhq_s16/vqrdmulhq_s32 <markos> https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:@navigationhierarchiessimdisa=[Neon]&q=vqrdmulhq_s16 <markos> https://developer.arm.com/documentation/ddi0596/2021-03/SIMD-FP-Instructions/SQRDMULH--vector---Signed-saturating-Rounding-Doubling-Multiply-returning-High-half-?lang=en for the asm instruction
First working prototype/design here: https://libre-soc.org/openpower/sv/twin_butterfly/
(In reply to Konstantinos Margaritis (markos) from comment #1) > First working prototype/design here: > > https://libre-soc.org/openpower/sv/twin_butterfly/ awesome. comments: * maddsubrs RT,RA,SH,RB normally (by convention) RB is in the 3rd operand position.
*** This bug has been marked as a duplicate of bug 1074 ***