Bug 1049 - implement Fixed and Floating point LD/ST-with-update postincrement EXT2xx instructions in ISACaller
Summary: implement Fixed and Floating point LD/ST-with-update postincrement EXT2xx ins...
Status: CONFIRMED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: Other Linux
: High enhancement
Assignee: Luke Kenneth Casson Leighton
URL: https://libre-soc.org/openpower/sv/rf...
Depends on: 924
Blocks:
  Show dependency tree / graph
 
Reported: 2023-04-03 01:07 BST by Luke Kenneth Casson Leighton
Modified: 2024-02-03 08:44 GMT (History)
1 user (show)

See Also:
NLnet milestone: NLnet.2022-08-051.OPF
total budget (EUR) for completion of task and all subtasks: 3000
budget (EUR) for this task, excluding subtasks' budget: 3000
parent task for budget allocation: 1011
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:
lkcl=3000

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Description Luke Kenneth Casson Leighton 2023-04-03 01:07:04 BST 
ISACaller (and binutils) needs EXT2xx instructions with postinc
as actual instructions, removing the PI SVP64 bit.
Comment 1 Luke Kenneth Casson Leighton 2023-04-03 01:12:50 BST 
this one really needs EXT2xx which in turn needs EXT009
approved for SVP64. see bug #924