Bug 1058 - add cprop instruction to ISACaller
Summary: add cprop instruction to ISACaller
Status: RESOLVED INVALID
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Toshaan Bharvani
URL: https://libre-soc.org/openpower/sv/ve...
Depends on:
Blocks:
 
Reported: 2023-04-15 09:55 BST by Luke Kenneth Casson Leighton
Modified: 2023-04-27 08:56 BST (History)
2 users (show)

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Description Luke Kenneth Casson Leighton 2023-04-15 09:55:50 BST 
the cprop instruction needs adding to ISACaller
https://libre-soc.org/openpower/sv/vector_ops/
Comment 1 Luke Kenneth Casson Leighton 2023-04-15 10:06:40 BST 
toshaan this one's ridiculously simple to get started with, the
pseudocode is 3 lines:

   P = (RA)
   G = (RB)
   RT = ((P|G)+G)^P

and you can look at the existing xor, or and add instructions
to make sure the syntax is correct.  it would need to go in
here:

    https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isa/bitmanip.mdwn;hb=HEAD

and the commit diffs listed on the "checklist" are blindingly-obvious
examples of how to add the instruction, do make sure to follow the
practice of putting each commit message into this bugreport, in sequence
(the link to the "diff" page makes life easiest for review)

    https://libre-soc.org/docs/
Comment 2 Luke Kenneth Casson Leighton 2023-04-21 09:05:21 BST 
https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isa/av.mdwn;hb=HEAD

apologies added the pseudocode months ago, bmask too
Comment 3 Luke Kenneth Casson Leighton 2023-04-21 11:01:49 BST 
sorry this one is already done!