Bug 818 - Simulation of ls2 peripheral fabric with core
Summary: Simulation of ls2 peripheral fabric with core
Status: RESOLVED FIXED
Alias: None
Product: Libre-SOC's second ASIC
Classification: Unclassified
Component: source code (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL: https://libre-soc.org/HDL_workflow/ls2/
Depends on:
Blocks: 814
  Show dependency treegraph
 
Reported: 2022-04-24 14:25 BST by Luke Kenneth Casson Leighton
Modified: 2022-08-29 22:58 BST (History)
1 user (show)

See Also:
NLnet milestone: NGI.POINTER.Gigabit.ASIC
total budget (EUR) for completion of task and all subtasks: 12000
budget (EUR) for this task, excluding subtasks' budget: 12000
parent task for budget allocation: 814
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:
tobias={amount=2000, paid=2022-07-09} lkcl={amount=2000, paid=2022-07-09} # viola paid red={amount=8000, submitted=2022-06-20, paid=2022-07-09}


Attachments

Note You need to log in before you can comment on or make changes to this bug.
Description Luke Kenneth Casson Leighton 2022-04-24 14:25:29 BST
NGI POINTER: simulate ls2 with libre-soc core

* verilator: working
* icarus verilator with QSPI: working
* icarus verilator with DRAM: working
* icarus verilator with HyperRAM: working

https://git.libre-soc.org/?p=ls2.git;a=tree;hb=HEAD