Bug 174 - NLNet 2019 Formal Standards OpenPOWER proposal 2019-10-046
Summary: NLNet 2019 Formal Standards OpenPOWER proposal 2019-10-046
Status: IN_PROGRESS
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Milestones (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Alain D D Williams
URL:
Depends on: 213 214 236 237 238 239 240 241 242 243
Blocks:
  Show dependency treegraph
 
Reported: 2020-02-08 15:08 GMT by Luke Kenneth Casson Leighton
Modified: 2020-04-15 13:14 BST (History)
4 users (show)

See Also:
NLnet milestone: NLNet.2019.10.Standards
total budget (EUR) for completion of task and all subtasks: 50000
budget (EUR) for this task, excluding subtasks' budget: 0
parent task for budget allocation:
child tasks for budget allocation: 213 214 236 237 238 239 240 241 242 243 264 282 308 473
The table of payments (in EUR) for this task; TOML format:


Attachments

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Description Luke Kenneth Casson Leighton 2020-02-08 15:08:40 GMT
Toplevel bugreport to create list of milestones for the Standards Proposal
https://libre-riscv.org/nlnet_2019_standards/

* bug #213 SimpleV Standard writeup needed
* bug #214 ISAMUX/NS Standard writeup needed
* bug #236 Atomics 
* bug #237 Variable Encoding
* bug #238 Compressed
* bug #239 FP16
* bug #240 ISA Switch (POWER-RV64GC)
* bug #241 openpower simulator
* bug #242 unit tests under simulator
* bug #243 documentation budget of OpenPower development discussion and proposals
Comment 1 Luke Kenneth Casson Leighton 2020-02-08 15:23:37 GMT
TODO on here:

* actual development of standards, these have been partially informally
  written up and are tagged (ikiwiki) here: https://libre-riscv.org/standards/
* all of the above need to be adopted (sigh) to PowerISA
* a software simulator needs to be rewritten (probably http://www.m5sim.org)
* communication with the relevant OpenPower Foundation members needs to be
  established and our existence and status as a peer contributor "asserted"
  (if you know what i mean)
* formal write-up of the (informal) standards needed, followed by presentation
  (and walking through "acceptance" process) with OpenPower Foundation
* creating a suitable "Formal Correctness Proof" of the augmentations to
  the standard(s), which is marginally complicated by the fact that IBM /
  Freescale / NXP as part of the OpenPower Foundation don't *have* a process
  in place for this... yet.  they know they need one.

budgets for standards writeup:

* SimpleV EUR 8000
* ISAMUX/NS 2500
* Atomics 2500
* Variable Encoding 2500
* Compressed 5000
* FP16 2500
* ISA Switch (POWER-RV64GC) 3000

total EUR 26000

* openpower simulator: EUR 12000
* unit tests under simulator: EUR 6000
* communications budget for OpenPower Member discussion and proposals: EUR 6000
* formal proofs: leave off because it still needs discussion with OpenPower Foundation
Comment 2 Luke Kenneth Casson Leighton 2020-03-09 22:06:23 GMT
so, alain: again, we need a straight text file (a comment here is sufficient) taking:

* each URL of each bugreport above
* each of the bugreports comment *zero* above
* each budget amount above
* each summary line above

from those 4 pieces of information arrange them heading, budget, url, paragraph, heading, budget, url, paragraph.

NLNet can then take that as "Schedule A" to the MoU, which we can sign.

see http://bugs.libre-riscv.org/show_bug.cgi?id=158#c4 for an example.
Comment 3 Luke Kenneth Casson Leighton 2020-03-09 22:10:18 GMT

    
Comment 4 Luke Kenneth Casson Leighton 2020-03-13 12:41:05 GMT
Schedule A for the MoU of Formal Standards OpenPOWER proposal 2019-10-046

# SimpleV
The SimpleV Standard, applied to POWER ISA, needs to be written up in a form suitable for proposal to the OpenPOWER Foundation at a later date.  Followthrough to adoption included.
Current draft starting page: https://libre-riscv.org/simple_v_extension/

Budget: EUR 8000
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=213

# ISAMUX/NS 
The ISAMUX/NS Standard, applied to POWER ISA, needs to be written up in a form suitable for proposal to the OpenPOWER Foundation.  Followthrough to adoption included.

Budget: 2500
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=214

# Atomics
A formal write-up of the c++ Atomics protocol is needed, to be proposed
to the OpenPOWER Foundation.  This will be useful for OpenPOWER as well.

Budget: 2500
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=236

# Variable Encoding
A formal write-up of the Variable-sized Opcode protocol is needed, to
be proposed to the OpenPOWER Foundation at a later date.

Budget: 2500
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=237

# Compressed
A formal write-up of a suitable compressed ISA Opcode protocol is needed, to
be proposed to the OpenPOWER Foundation at a later date.

Budget: 5000
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=238

# FP16
A formal write-up of the augmentation of POWER ISA to switch on IEEE754 FP16 (also useable for  FP128) is needed, to be proposed to the OpenPOWER Foundation at a later date.

Budget: 2500
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=239

# ISA Switch (POWER-RV64GC)
A formal write-up of the means by which processors may switch to RISC-V (and back, from POWER), to be proposed to the OpenPOWER Foundation at a later date.

Budget: 3000
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=240

# OpenPOWER simulator
Augmentation of an existing POWER ISA simulator that implements the proposed standards is needed.  It is likely to start from gem5.  Upstreaming is also
to be considered.

Budget: EUR 12000
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=241

# unit tests under OpenPOWER simulator
For each instruction added which is part of the proposed standards, under the simulator a unit test is needed for that instruction.

Budget: EUR 6000
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=242

# Documentation budget for OpenPower Member discussion and proposals
The informal development process for the Standards is a critical step that involves documenting all ideas and prototype proposals, then seeking feedback from the relevant stakeholders and the wider internet community.  This takes several months and involves tens of thousands of words being written and then reviewed.  All documentation will be on the Wiki.

Budget: EUR 6000
URL: http://bugs.libre-riscv.org/show_bug.cgi?id=243
Comment 5 Luke Kenneth Casson Leighton 2020-04-15 13:14:29 BST
received signed MoU from Bob Goudriaan at NLNet (with thanks and gratitude)