Bug 52 - software simulator compliant with the latest SimpleV Vectorisation Standard (SVP64)
Summary: software simulator compliant with the latest SimpleV Vectorisation Standard (...
Status: CONFIRMED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: Source Code (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL: https://libre-soc.org/openpower/sv/im...
Depends on: 170 232 104 105
Blocks: 191
  Show dependency treegraph
 
Reported: 2019-03-21 11:29 GMT by Luke Kenneth Casson Leighton
Modified: 2021-05-13 21:25 BST (History)
2 users (show)

See Also:
NLnet milestone: NLnet.2019.02
total budget (EUR) for completion of task and all subtasks: 6000
budget (EUR) for this task, excluding subtasks' budget: 6000
parent task for budget allocation: 191
child tasks for budget allocation:
The table of payments (in EUR) for this task; TOML format:


Attachments

Note You need to log in before you can comment on or make changes to this bug.
Description Luke Kenneth Casson Leighton 2019-03-21 11:29:25 GMT

    
Comment 1 Luke Kenneth Casson Leighton 2021-05-13 21:24:54 BST
ISACaller - the python-based software simulator - is where these
features are being (successfully) implemented.